* Low jitter 400 Mbps fully differential data path
* 145 ps (typ) of pk-pk jitter with PRBS = 223
* 1 data pattern
* at 400 Mbps Single +3.3 V Supply Balanced output impedance Output channel-to-channel skew is 35ps (typ) Differe
DS90LV110AT Datasheet (1.25 MB)
DS90LV110AT
National Semiconductor
1.25 MB
1 to 10 lvds data/clock distributor.
DS90LV110AT 1 to 10 LVDS Data/Clock Distributor with Failsafe www.DataSheet4U.com September 19, 2008 DS90LV110AT 1 to 10 LVDS Data/Clock Distributo.
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