Datasheet4U Logo Datasheet4U.com

MC10E137 - 5V?ECL 8?Bit Ripple Counter

Datasheet Summary

Description

The MC10E137 is a very high speed binary ripple counter.

The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS™ output edge rates.

Features

  • XORed enable inputs, EN1 and EN2, which are synchronous to the CLK input. When only one synchronous enable is asserted the counter becomes disabled on the next CLK transition; all outputs remain in the previous state poised for the other synchronous enable or A_Start to be asserted to re-enable the counter. Asserting both synchronous enables causes the counter to become enabled on the next transition of the CLK. If EN1 (or EN2) and CLK edges are coincident, sufficient delay has been inserted in.

📥 Download Datasheet

Datasheet preview – MC10E137

Datasheet Details

Part number MC10E137
Manufacturer ON Semiconductor
File Size 201.18 KB
Description 5V?ECL 8?Bit Ripple Counter
Datasheet download datasheet MC10E137 Datasheet
Additional preview pages of the MC10E137 datasheet.

📁 Similar Datasheet

  • MC10E137 - 8-BIT RIPPLE COUNTER (Motorola)
  • MC10E131 - 4-BIT D FLIP-FLOP (Motorola)
  • MC10E136 - 6-BIT UNIVERSAL UP/DOWN COUNTER (Motorola)
  • MC10E101 - Quad 4-Input OR/NOR Gate (Motorola)
  • MC10E104 - QUINT 2-INPUT AND/NAND GATE (Motorola)
  • MC10E107 - QUINT 2-INPUT XOR/XNOR GATE (Motorola)
  • MC10E111 - 1:9 DIFFERENTIAL CLOCK DRIVER (Motorola)
  • MC10E112 - QUAD DRIVER (Motorola)
  • MC10E116 - QUINT DIFFERENTIAL LINE RECEIVER (Motorola)
  • MC10E122 - 9-BIT BUFFER (Motorola)
Other Datasheets by ON Semiconductor

Full PDF Text Transcription

Click to expand full text
5 V ECL 8‐Bit Ripple Counter MC10E137 Description The MC10E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPS™ output edge rates. This allows the counter to operate at very high frequencies while maintaining a moderate power dissipation level. The device is ideally suited for multiple frequency clock generation as well as a counter in a high performance ATE time measurement board. Both asynchronous and synchronous enables are available to maximize the device’s flexibility for various applications. The asynchronous enable input, A_Start, when asserted enables the counter while overriding any synchronous enable signals.
Published: |