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PLL205-01 Motherboard Clock Generator

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Description

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Name VDD0 VDD1 VDD2 VDD3 VDD4 GND XIN XOUT REF0//CPU_STOP Number 1 6 14 19,30,36,42 27 3,9,16,22, 33,39,45,47 4 5 2 Type P P P P P P I O B Power su.

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Datasheet Specifications

Part number
PLL205-01
Manufacturer
PhaseLink
File Size
129.31 KB
Datasheet
PLL205-01_PhaseLink.pdf
Description
Motherboard Clock Generator

Features

* w w
* w Generates all clock frequencies for VIA K7 chip sets requiring multiple CPU clocks and high speed SDRAM buffers. Support one pair of differential CPU clocks, one open-drain CPU, 6 PCI and 13 h

Applications

* One 24_48MHz clock and one 48MHz clock. Two14.318MHz reference clocks. Power management control to stop CPU, and Power down Mode from I2C programming. Support 2-wire I2C serial bus interface with builtin Vendor ID, Device ID and Revision ID. Single byte micro-step linear Frequency Programming via I

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