ICS548A-03 Datasheet - Renesas

ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER

The ICS548A-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two. Using our patented Phase-Locked Loop (PLL) techniques, the device operates from a frequency range of 10 MHz to 120 MH.

ICS548A-03 Features

* Packaged in 16-pin SOIC (150 mil)

* Input clock up to 160 MHz in the non-PLL mode

* Provides clock outputs of CLK, CLK, and CLK/2

* Low skew (500 ps) on CLK, CLK, and CLK/2

* All outputs can be tri-stated

* Entire chip can be powered down by changing

ICS548A-03 Datasheet (292.89 KB)