ICSSSTVF16857 Datasheet - Renesas

ICSSSTVF16857 DDR 14-Bit Registered Buffer

ICSSSTVF16857 Features

* Differential clock signal

* Meets SSTL_2 signal data

* Supports SSTL_2 class I & II specifications

* Low-voltage operation - Voo = 2.3V to2.7V

* 48 pin TSS OP and TVS OP package Truth Table1 Inputs RESET# CLK CLK# L Xor Xor Floating Floating H t J,

Datasheet Details

ICSSSTVF16857

484.89 KB

Ddr 14-bit registered buffer.

📁 Related Datasheet

ICSSSTVF16859 DDR 13-Bit to 26-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTV16857 DDR 14-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTV16859 DDR 13-Bit to 26-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTV32852 DDR 24-Bit to 48-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTVA16857 DDR 14-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTVA16859B DDR 13-Bit to 26-Bit Registered Buffer (Integrated Circuit Systems)

ICSSSTVA16859C DDR 13-Bit to 26-Bit Registered Buffer (Renesas)

ICSSSTVA16859C DDR 13-Bit to 26-Bit Registered Buffer (IDT)

TAGS

ICSSSTVF16857 Distributor