ICSSSTV16857 - DDR 14-Bit Registered Buffer
The 14-bit ICSSTV16857 is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O Levels except for the RESET# input which is LVCMOS.
Data flow from D to Q is controlled by the differential clock, CLK, CLK# and RESET#.
Data is triggered on the positive edge of CLK.
CLK# must be
ICSSSTV16857 Features
* Differential clock signal
* Meets SSTL_2 signal data
* Supports SSTL_2 class I & II specifications
* low-voltage operation VDD = 2.3V to 2.7V
* 48 pin TSSOP package Pin Configuration Q1 Q2 GND VDDQ Q3 Q4 Q5 GND VDDQ Q6 Q7 VDDQ GND Q8 Q9 VDDQ GND Q10 Q11 Q1
