* Differential clock signals
* Meets SSTL_2 signal data
* Supports SSTL_2 class II specifications on outputs
* low-voltage operation - VDD = 2.3V to 2.7V
* Available in 64 pin TSSOP and 56 pin MLF2 packages Pin Configurations Q13A Q12A Q11A Q10A Q9A VDDQ GND
ICSSSTV16859 Datasheet (233.84 KB)
ICSSSTV16859
Integrated Circuit Systems
233.84 KB
Ddr 13-bit to 26-bit registered buffer.
Integrated Circuit Systems, Inc. ICSSSTV16859 Preliminary Product Preview DDR 13-Bit to 26-Bit Registered Buffer Recommended Application: DDR Memory.
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