ICSSSTVA16857 - DDR 14-Bit Registered Buffer
The 14-bit ICSSSTVA16857 is a universal bus driver designed for 2.3V to 2.7V VDD operation and SSTL_2 I/O levels, except for the LVCMOS RESET# input.
Data flow from D to Q is controlled by the differential clock (CLK/CLK#) and a control signal (RESET#).
The positive edge of CLK is used to trigger th
ICSSSTVA16857 Features
* Exceeds "SSTVN16857" performance
* Differential clock signal
* Meets SSTL_2 signal data
* Supports SSTL_2 class I & II specifications
* Low-voltage operation - VDD = 2.3V to 2.7V
* 48 pin TSSOP package Pin Configuration Q1 Q2 GND VDDQ Q3 Q4 Q5 GND
