Description
PRELIMINARY KM732V589A/L Document Title 32Kx32-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100 QFP/TQFP 32Kx32 Synchronous SRAM .
The KM732V589A/L is a 1,048,576-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC b.
Features
* Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address
Applications
* GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP disable to support address pipelining. Burst cycle can be initiated with either the
