K4S280832A Datasheet (Samsung semiconductor) - 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL

K4S280832A, 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL

The K4S280832A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock

K4S280832A Features

* JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled a