Description
K7A403600B K7A403200B K7A401800B Document Title 128Kx36/x32 & 256Kx18 Synchronous SRAM 128Kx36 & 128Kx32 & 256Kx18-Bit Synchronous Pipelined Burst S.
The K7A403600B, K7A403200B and K7A401800B are 4,718,592-bit Synchronous Static Random Access Memory designed for high performance second level cache o.
Features
* Synchronous Operation.
* 2 Stage Pipelined operation with 4 Burst.
* On-Chip Address Counter.
* Self-Timed Write Cycle.
* On-Chip Address and Control Registers.
* VDD= 3.3V+0.3V/-0.165V Power Supply.
* VDDQ Supply Voltage 3.3V+0.3V/-0.165V fo
Applications
* GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address
