THC63LVDF64A Datasheet - THine Electronics

THC63LVDF64A (THC63LVDF64A / THC63LVDM63A) LVDS 18-Bit Color Host-LCD Panel Interface Receiver

The THC63LVDM63A transmitter converts 21 bits of CMOS/TTL data into LVDS(Low Voltage Differential Signaling) data stream. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. The THC63LVDM63A can be programmed for rising edge or falling edge clocks .

THC63LVDF64A Features

* 21:3 Data channel compression at up to 223 Megabytes per sec throughput Wide Frequency Range: 20 - 85 MHz suited for VGA,SVGA,XGA and SXGA Narrow bus (8 lines) reduces cable size 345mV swing LVDS devices for Low EMI Supports Spread Spectrum Clock Generator On chip Input Jitter Filtering PLL requires

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