TC74HC112AFN Datasheet - Toshiba Semiconductor

TC74HC112AFN Dual J-K Flip-Flop

TC74HC112AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC112AP, TC74HC112AF Dual J-K Flip Flop with Preset and Clear The TC74HC112A is a high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. In accordance with the logic levels applied to the J and K inputs, the outputs change state on the negative going transition of the clock puls.

TC74HC112AFN Features

* High speed: fmax = 67 MHz (typ.) at VCC = 5 V

* Low power dissipation: ICC = 2 μA (max) at Ta = 25°C

* High noise immunity: VNIH = VNIL = 28% VCC (min)

* Output drive capability: 10 LSTTL loads

* Symmetrical output impedance: |IOH| = IOL = 4 mA (min)

TC74HC112AFN Datasheet (248.16 KB)

TC74HC112AFN Datasheet Preview — Preview of TC74HC112AFN PDF

Datasheet Details

Part number:

TC74HC112AFN

Manufacturer:

Toshiba ↗ Semiconductor

File Size:

248.16 KB

Description:

Dual j-k flip-flop.

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TC74HC112AFN Dual J-K Flip-Flop Toshiba Semiconductor

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