Datasheet Specifications
- Part number
- CLA70000
- Manufacturer
- Zarlink Semiconductor
- File Size
- 188.90 KB
- Datasheet
- CLA70000_ZarlinkSemiconductor.pdf
- Description
- High Density CMOS Gate Arrays
Description
( DataSheet : www.DataSheet4U.com ) CLA70000 Series High Density CMOS Gate Arrays DS2462 ISSUE 3.1 March 1992 Recent advances in CMOS processing .
Features
* Low power channelless arrays from 5,000 to 250,000 available gates (5µ W / gate / MHz) 1 micron (0.8 micron effective) twin well epitaxial process Typical gate delays of 400 ps (NAND2 , Fanout=2) Comprehensive cell library including DSP, JTAG/BIST and compiledApplications
* needs. Three separate power rings are used, one each for the internal core logic, intermediate buffer cells, and large output driver cells. Noise generated in the low impedance output drivers is isolated from the core logic and buffer areas. The distribution of the supply rails can be automaticallyCLA70000 Distributors
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