74AUP2G240 Datasheet - nexperia

Low-power dual inverting buffer/line driver

74AUP2G240 Features

* Wide supply voltage range from 0.8 V to 3.6 V

* High noise immunity

* Complies with JEDEC standards:

* JESD8-12 (0.8 V to 1.3 V)

* JESD8-11 (0.9 V to 1.65 V)

* JESD8-7 (1.2 V to 1.95 V)

* JESD8-5 (1.8 V to 2.7 V)

* JESD8-B (2.7 V to 3

74AUP2G240 General Description

The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolerant to slo.

74AUP2G240 Datasheet (281.17 KB)