CY7C131

Manufacturer: Cypress (now Infineon)

This datasheet includes multiple variants, all published together in a single manufacturer document.

Datasheet Details

Two ports are provided permitting independent access to any location in memory. The CY7C130/130A/ CY7C131/131A can be used as either a.

True dual-ported memory cells, which allow simultaneous reads of the same memory location
1K x 8 organization
0.65 micron CMOS for optimum speed and power
High speed access: 15 ns
Low operating power: ICC = 110 mA (maximum)
Fully asynchronous operation
Automatic power down
BUSY output flag on CY7C130/130A/CY7C131/131A; BUSY input on CY7C140/CY7C141
INT flag for port-to-port munication
Available in 48-pin DIP (CY7C130/130A/140), 52-pin PLCC, 52-pin TQFP

Brand Logo	Part Number	Description	Other Manufacturers
	CY7C131AE	1K/2K x 8 Dual-Port Static RAM	Cypress
	CY7C131E	1K/2K x 8 Dual-Port Static RAM	Cypress

Part Number	Description
CY7C1310BV18	1.8V Synchronous Pipelined SRAM
CY7C1311AV18	(CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311BV18	(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311CV18	(CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1311JV18	(CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture
CY7C1311KV18	18-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C1312BV18	1.8V Synchronous Pipelined SRAM
CY7C1312KV18	18-Mbit QDR II SRAM Two-Word Burst Architecture
CY7C1313AV18	(CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture
CY7C1313BV18	(CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture