74HC11 Datasheet | Specifications & PDF Download

HD74HC11 Triple 3-input AND Gates Features • • • • • High Speed Operation: tpd = 9 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads

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74HC11; 74HCT11 Triple 3-input AND gate Rev. 6 — 19 November 2015 Product data sheet 1. General description The 74HC11; 74HCT11 is a triple 3-input

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www.ti.com SCHS273F – AUGUSTCC19DD977744–HHRCCEV11I11S,,ECCDDDAP55R44IHHL CC20112111 SCHS273F – AUGUST 1997 – REVISED APRIL 2021 CDx4HC11 Triple 3-In

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06

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HD74HC114 Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) Description This flip-flop is edge sensitive to the clock input and change

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M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET . . . . . . . . HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA at TA

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74HC11; 74HCT11 Triple 3-input AND gate Rev. 9 — 21 February 2024 Product data sheet 1. General description The 74HC11; 74HCT11 is a triple 3-input

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74HC112; 74HCT112 Dual JK flip-flop with set and reset; negative-edge trigger Rev. 4 — 11 January 2021 Product data sheet 1. General description T

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74HC11-Q100; 74HCT11-Q100 Triple 3-input AND gate Rev. 4 — 11 August 2021 Product data sheet 1. General description The 74HC11-Q100; 74HCT11-Q100 i

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74HC11; 74HCT11 Triple 3-input AND gate Rev. 9 — 21 February 2024 Product data sheet 1. General description The 74HC11; 74HCT11 is a triple 3-input

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC74HC11A Triple 3-Input AND Gate High–Performance Silicon–Gate CMOS The MC74HC11A is id

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74HC112; 74HCT112 Dual JK flip-flop with set and reset; negative-edge trigger Rev. 4 — 11 January 2021 Product data sheet 1. General description T

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06

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HD74HC113 Dual J-K Flip-Flops (with Preset) Description This flip-flop is edge sensitive to the clock input and change state on the negative going tr

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TECHNICAL DATA KK74HC112A Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The KK74HC112A is identical in pinout to the LS/A

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SN54HC112, SN74HC112 SCLS099H – DECEMBER 1982 – REVISED JUNE 2022 SNx4HC112 Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 1 Featu

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SN54HC112, SN74HC112 SCLS099H – DECEMBER 1982 – REVISED JUNE 2022 SNx4HC112 Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 1 Featu

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