FDC636P
Overview
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance.
- 8 A, -20 V. RDS(ON) = 0.130 Ω @ VGS = -4.5 V RDS(ON) = 0.180 Ω @ VGS = -2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 S
- D 1 6 .63 6 2 5 G SuperSOT TM pin 1 *
