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KM736V689 - 64Kx36-Bit Synchronous Pipelined Burst SRAM

General Description

The KM736V689/L is a 2,359,296-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

Key Features

  • Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address and Control Registers. VDD= 3.3V-5%/+10% Power Supple 5V Tolerant Inputs Except I/O Pins. Byte Writable Function. Global Write Enable Controls a full bus-width write. Power Down State via ZZ Signal. LBO Pin all.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY KM736V689/L Document Title 64Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev. No. Rev. 0.0 Rev. 1.0 Rev. 1.1 64Kx36 Synchronous SRAM History Initial draft Final spec release Change -10/-11 tDS from 2.0ns to 2.5ns Draft Date Nov. 17. 1996 May. 01. 1997 Jun. 11. 1997 Remark Preliminary Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- April 1997 Rev 1.