* Synchronous Operation. On-Chip Address Counter. Write Self-Timed Cycle. On-Chip Address and Control Registers. Single 3.3V ±5% Power Supply. 5V Tolerant Inputs except I/O Pins. Byte Writable Function. Global Write Enable Controls a full bus-width write. Power Down State via ZZ Signal. Asynchronous O
KM736V687 Datasheet (457.78 KB)
KM736V687
Samsung Semiconductor
457.78 KB
64kx36-bit synchronous burst sram.
PRELIMINARY KM736V687 Document Title 64Kx36-Bit Synchronous Burst SRAM, 3.3V Power Datasheets for 100TQFP 64Kx36 Synchronous SRAM Revision History R.
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