KM736V787 Datasheet - Samsung Semiconductor

KM736V787 - 128Kx36 Synchronous SRAM

The KM736V787 is 4,718,592 bits Synchronous Static Random Access Memory designed to support zero wait state performance for advanced Pentium/Power PC based system.

And with CS1 high, ADSP is blocked to control signals.

It can be organized as 128K words of 36 bits.

And it integrates address and contr

KM736V787 Document Title 128Kx36-Bit Synchronous Burst SRAM 128Kx36 Synchronous SRAM Revision History Rev.

No.

0.0 0.1 History Initial draft Modify power down cycle timing & Interleaved read timing, Insert Note 4 at AC timing characteristics.

Change ISB1 value from 10mA to 30mA.

Change ISB2 value from 10mA to 20mA.

Change Undershoot spec from -3.0V(pulse width≤20ns) to -2.0V(pulse width≤tCYC/2) Add Overshoot spec 4.6V((pulse width≤tCYC/2) Change VIH max from 5.5V to VDD+0.5V Change ISB2 value

KM736V787 Features

* Synchronous Operation.

* On-Chip Address Counter.

* Write Self-Timed Cycle.

* On-Chip Address and Control Registers.

* VDD= 3.3V+0.3V/-0.165V Power Supply.

* VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.

KM736V787_SamsungSemiconductor.pdf