TC58NYG2S3ETA00 Datasheet | Toshiba

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 4 GBIT (512M × 8 BIT) CMOS NAND E2PROM DESCRIPTION The TC58NYG2S3E is a single 1.8V 4 Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 4096blocks. The device has two 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages). The TC58NYG2S3E is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for mand inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. Features - Organization Memory cell array Register Page size Block size x8 2112 × 256K × 8 2112 × 8 2112 bytes (128K + 4K) bytes - Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read - Mode control Serial input/output mand control - Number of valid blocks Min 4016 blocks Max 4096 blocks - Power supply VCC = 1.7V to 1.95V - Access time Cell array to register 30 µs max Serial Read Cycle 25 ns min (CL=30p F) - Program/Erase time Auto Page Program Auto Block Erase 300 µs/page typ. 2.5 ms/block typ. - Operating current Read (25 ns cycle) Program (avg.) Erase (avg.) Standby 30 m A max. 30 m A max 30 m A max 50 µA max - Package TSOP I 48-P-1220-0.50 (Weight: 0.53 g typ.) 1 2010-07-13C PIN ASSIGNMENT (TOP VIEW) PINNAMES ×8 NC NC NC NC NC NC RY / BY RE CE NC NC VCC VSS NC NC CLE ALE WE WP NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23...