LP61L1008 Datasheet (AMIC Technology) - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM

LP61L1008, 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM

The LP61L1008 is a high speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 3.3V power supply.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

The chip enable input is prov

LP61L1008 Features

* n Single 3.3V ± 10% power supply n Access times: 12/15 ns (max.) n Current: Operating: 180mA (max.) Standby: 5mA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL compatible n Center Power/Ground Pin Configuration n Common I/O using three-state