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LP61L1008A - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM

Datasheet Summary

Description

The LP61L1008A is a high speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 3.3V power supply.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Features

  • 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM n Single 3.3V ± 10% power supply n Access times: 8/10/12 ns (max. ) n Current: Operating: 160/155/150mA (max. ) Standby: 5mA (max. ) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL compatible n Center Power/Ground Pin Configuration n Common I/O using three-state output n Output enable and one chip enable inputs for easy.

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Datasheet Details

Part number LP61L1008A
Manufacturer AMIC Technology
File Size 118.35 KB
Description 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
Datasheet download datasheet LP61L1008A Datasheet
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Full PDF Text Transcription

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LP61L1008A Preliminary Features 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM n Single 3.3V ± 10% power supply n Access times: 8/10/12 ns (max.) n Current: Operating: 160/155/150mA (max.) Standby: 5mA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL compatible n Center Power/Ground Pin Configuration n Common I/O using three-state output n Output enable and one chip enable inputs for easy application n Data retention voltage: 2.0V (min.) n Available in 32-pin SOJ 300 mil package General Description The LP61L1008A is a high speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 3.3V power supply.
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