LP61L256B Datasheet (AMIC Technology) - 32K X 8 Bit High SPEED LOW VCC CMOS SRAM

LP61L256B, 32K X 8 Bit High SPEED LOW VCC CMOS SRAM

The LP61L256B is a high-speed, low-power 262,144-bit static random access memory organized as 32,768 words by 8 bits that operates on a single 3.3V power supply.

Input and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Minimum standby power

LP61L256B Features

* n Single +3.3 volt power supply n Access times: 12 ns (max.) n Current: Operating: 100mA (max.) Standby: 10mA (max.) n Full static operation, no clock or refreshing required n n n n All inputs and outputs directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min.) A