* n Single +3.3V power supply n Access times: 12/15 ns (max.) n Current: Operating: 120mA (max.) Standby: 5mA (max.) n Full static operation, no clock or refreshing required n n n n All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min.)
LP61L256C Datasheet (110.08 KB)
LP61L256C
AMIC Technology
110.08 KB
32k x 8 bit high speed cmos sram.
LP61L256C
Preliminary
Document Title 32K X 8 BIT HIGH SPEED CMOS SRAM Revision History
Rev. No.
0.0
32K X 8 BIT HIGH SPEED CMOS SRAM
History
Initial.
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