LP61L256C Datasheet (AMIC Technology) - 32K X 8 BIT HIGH SPEED CMOS SRAM

LP61L256C, 32K X 8 BIT HIGH SPEED CMOS SRAM

The LP61L256C is a high-speed, low-power 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a single 3.3V power supply.

It is built using high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with co

LP61L256C Features

* n Single +3.3V power supply n Access times: 12/15 ns (max.) n Current: Operating: 120mA (max.) Standby: 5mA (max.) n Full static operation, no clock or refreshing required n n n n All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min.)