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CY7C1219F 1-Mbit (32K x 36) Pipelined DCD Sync SRAM

CY7C1219F Description

CY7C1219F www.DataSheet4U.com 1-Mbit (32K x 36) Pipelined DCD Sync SRAM .
1] The CY7C1219F SRAM integrates 32,768 x 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operat.

CY7C1219F Features

* Registered inputs and outputs for pipelined operation
* Optimal for performance (Double-Cycle deselect)
* Depth expansion without wait state
* 32K × 36-bit common I/O architecture
* 3.3V
* 5% and +10% core power supply (VDD)
* 3.3V I/O supply

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Datasheet Details

Part number
CY7C1219F
Manufacturer
Cypress Semiconductor
File Size
375.20 KB
Datasheet
CY7C1219F_CypressSemiconductor.pdf
Description
1-Mbit (32K x 36) Pipelined DCD Sync SRAM

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📌 All Tags

1-Mbit 32K Pipelined DCD Sync SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1219F-like datasheet