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CY7C1373D 18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

CY7C1373D Description

CY7C1371D CY7C1373D 18-Mbit (512 K × 36/1 M × 18) Flow-Through SRAM with NoBL™ Architecture 18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL.

CY7C1373D Features

* No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles
* Supports up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin-compatible and functionally equivalent to ZBT™ devices
* Internally self-timed outp

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Datasheet Details

Part number
CY7C1373D
Manufacturer
Cypress Semiconductor
File Size
802.19 KB
Datasheet
CY7C1373D_CypressSemiconductor.pdf
Description
18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

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📌 All Tags

18-Mbit 512 Flow-Through SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1373D-like datasheet