Description
PRELIMINARY CY7C1484V33 CY7C1485V33 2M x 36/4M x 18 Pipelined DCD SRAM .
The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced single-layer polysilicon, triple-layer metal techn.
Features
* Fast clock speed: 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate Fast access time: 2.6, 3.0, and 3.4 ns Optima
Applications
* High-density, high-speed packages JTAG boundary scan for BGA packaging version Available in 119-ball bump BGA and 100-pin TQFP packages (CY7C1484V33 and CY7C1485V33). 165-ball FBGA will be offered on an opportunity basis. (Please contact Cypress sales or marketing) internal burst operation. All sync
