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CY7C1526V18 Datasheet - Cypress Semiconductor

(CY7C15xxV18) SRAM 4-Word Burst Architecture

CY7C1526V18 Features

* Separate Independent Read and Write Data Ports

* Supports concurrent transactions

* 250-MHz Clock for High Bandwidth

* 4-Word Burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 500 M

CY7C1526V18 General Description

The CY7C1511V18, CY7C1526V18, CY7C1513V18, and CY7C1515V18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write Port ha.

CY7C1526V18 Datasheet (561.73 KB)

Preview of CY7C1526V18 PDF

Datasheet Details

Part number:

CY7C1526V18

Manufacturer:

Cypress Semiconductor

File Size:

561.73 KB

Description:

(cy7c15xxv18) sram 4-word burst architecture.

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CY7C1526V18 CY7C15xxV18 SRAM 4-Word Burst Architecture Cypress Semiconductor

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