CY7C1526V18, CY7C1511V18 Datasheet - Cypress Semiconductor

CY7C1526V18, CY7C1511V18, (CY7C15xxV18) SRAM 4-Word Burst Architecture

www.DataSheet4U.com PRELIMINARY CY7C1511V18 CY7C1526V18 CY7C1513V18 CY7C1515V18 72-Mbit QDR™-II SRAM 4-Word Burst Architecture

Features

* Separate Independent Read and Write Data Ports
* Supports concurrent transactions
* 250-MHz Clock for High Bandwidth
* 4-Word Burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 500 M

CY7C1511V18_CypressSemiconductor.pdf