CY7C2265XV18 - 36-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
CY7C2265XV18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 633 MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 1266 MHz) at 633 MHz
