Datasheet4U.com

CY7C2268KV18 - 36-Mbit DDR II+ SRAM Two-Word Burst Architecture

Cypress Semiconductor

📥 Download Datasheet

CY7C2268KV18 Datasheet Preview — Preview of CY7C2268KV18 PDF

datasheet Preview Page 2

datasheet Preview Page 3

Datasheet Details

Part number: CY7C2268KV18
Manufacturer: Cypress Semiconductor
File Size: 625.92 KB
Datasheet: CY7C2268KV18-CypressSemiconductor.pdf
Description: 36-Mbit DDR II+ SRAM Two-Word Burst Architecture

CY7C2268KV18 Product details

Features

36-Mbit density (2 M × 18, 1 M × 36).
550 MHz clock for high bandwidth.
Two-word burst for reducing address bus frequency.
Double data rate (DDR) interfaces (data transferred at 1100 MHz) at 550 MHz.
Available in 2.5 clock cycle latency.
Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only.
Echo clocks (CQ and CQ) simplify data capture in high speed systems.
Data valid pin (QVLD) to indicate valid data on the output.
On.

📁 Related Datasheet

CY7C225 - 512 x 8 Registered PROM (Cypress)
CY7C277 - 32K x 8 Reprogrammable Registered PROM (Cypress)
CY7C008 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
CY7C008V - 3.3V 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
CY7C009 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
CY7C009V - 128K x 8 Dual-Port Static RAM (Cypress)
CY7C018 - 64K/128K x 8/9 Dual-Port Static RAM (Cypress)
CY7C018V - 3.3V 64K/128K x 8/9 Dual-Port Static RAM (Cypress)

📌 All Tags

36-Mbit DDR II + SRAM Two-Word Burst Architecture Cypress Semiconductor

Cypress Semiconductor CY7C2268KV18-like datasheet

CY7C2262XV18 - 36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
CY7C2263KV18 - 36-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C2263XV18 - 36-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
CY7C2264XV18 - 36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
CY7C2265KV18 - 36-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C2265XV18 - 36-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture

CY7C2268KV18 Stock/Price