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CY7C1473V25, CY7C1471V25 (CY7C147xV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM

CY7C1473V25 Description

www.DataSheet4U.com PRELIMINARY CY7C1471V25 CY7C1473V25 CY7C1475V25 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL™ Architecture Fea.
1] The CY7C1471V25, CY7C1473V25 and CY7C1475V25 are 2.

CY7C1473V25 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
* Can support up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* In

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This datasheet PDF includes multiple part numbers: CY7C1473V25, CY7C1471V25. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
CY7C1473V25, CY7C1471V25
Manufacturer
Cypress Semiconductor
File Size
428.71 KB
Datasheet
CY7C1471V25_CypressSemiconductor.pdf
Description
(CY7C147xV25) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM
Note
This datasheet PDF includes multiple part numbers: CY7C1473V25, CY7C1471V25.
Please refer to the document for exact specifications by model.

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Cypress Semiconductor CY7C1473V25-like datasheet