* JEDEC Standard VDD/VDDQ = 1.35V-0.065/+0.1V
* Backward compatible to VDD/ VDDQ = 1.5V ±0.075V..
* All inputs and outputs are compatible with SSTL_15 interface.
* Fully differential clock inputs (CK, /CK) operation.
* Eight Banks
* Posted CAS by progr
EM47EM1688MBB Datasheet (1.76 MB)
EM47EM1688MBB
Eorex
1.76 MB
4gb double data rate-3 sdram.
Revision History Revision 0.1 (Oct. 2013) -First release. EM47EM1688MBB Oct. 2013 1/38 www.eorex.com EM47EM1688MBB 4Gb (32M×8Bank×16) Double DATA.
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