Datasheet4U Logo Datasheet4U.com

HD74HC108 Dual J-K Flip-Flops

HD74HC108 Description

HD74HC108 Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) .
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse.

HD74HC108 Features

* High Speed Operation: tpd (Clock to Q) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) HD74HC

📥 Download Datasheet

Preview of HD74HC108 PDF
datasheet Preview Page 2 datasheet Preview Page 3

📁 Related Datasheet

  • HD74HC123A - Dual Retriggerable Monostable Multivibrators (Renesas)
  • HD74HC125 - Quad. Bus Buffer Gates (Renesas)
  • HD74HC126 - Quad. Bus Buffer Gates (Renesas)
  • HD74HC131 - 3-to-8-line Decoder/Demultiplexer (Renesas)
  • HD74HC132 - Quad. 2-input NAND Schmitt Triggers (Renesas)
  • HD74HC133 - 13-input NAND Gate (Renesas)
  • HD74HC137 - 3-to-8-line Decoder/Demultiplexer (Renesas)
  • HD74HC138 - 3-to-8-line Decoder/Demultiplexer (Renesas)

📌 All Tags

Dual J-K Flip-Flops Hitachi Semiconductor
Hitachi Semiconductor HD74HC108-like datasheet