* Double metal process for low gate resistance
* miniBLOC, with Aluminium nitride isolation
* Unclamped Inductive Switching (UIS) rated
* Low package inductance G = Gate S = Source S D D = Drain Either Source terminal at miniBLOC can be used as Main or Kelvin Source VI
IXFN72N55Q2 Datasheet (581.04 KB)
IXFN72N55Q2
IXYS Corporation
581.04 KB
Power mosfet.
HiPerFETTM Power MOSFET N-Channel Enhancement Mode Avalanche Rated, Low Qg, Low Intrinsic Rg High dV/dt, Low trr Preliminary Data Sheet IXFN 72N55Q2 .
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