IXFN75N50, IXFN80N50 Datasheet - IXYS Corporation

IXFN75N50 - (IXFN80N50 / IXFN75N50) HiPerFET Power MOSFETs Single Die MOSFET

HiPerFETTM Power MOSFETs Single Die MOSFET N-Channel Enhancement Mode Avalanche Rated, High dv/dt, Low trr VDSS IXFN 80N50 IXFN 75N50 D G S ID25 80 A 75 A RDS(on) 50 mΩ 55 mΩ 500 V 500 V S Symbol VDSS VDGR VGS VGSM ID25 IDM IAR EAR EAS dv/dt PD TJ TJM Tstg VISOL Md Weight Symbol Test Conditions TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MΩ Continuous Transient TC = 25°C, Chip capability TC = 25°C, pulse width limited by TJM TC = 25°C TC = 25°C TC = 25°C IS ≤ IDM, di/dt ≤ 100 A/µs, VDD

IXFN75N50 Features

* International standard packages

* miniBLOC, with Aluminium nitride isolation

* Low RDS (on) HDMOSTM process

* Rugged polysilicon gate cell structure

* Unclamped Inductive Switching (UIS) rated 50/60 Hz, RMS IISOL ≤ 1 mA t = 1 min t=1s 2500 3000 Mountin

IXFN80N50_IXYSCorporation.pdf