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ZL30623 Dual-Channel Any Frequency Timing Card PLL

ZL30623 Description

Register Map: Section 6.2 .
8 5.

ZL30623 Features

* Two Independent Channels
* Low-Bandwidth DPLL Per Channel
* ITU-T G.813/G.8262 compliance (options 1 & 2)
* Programmable bandwidth, 0.1Hz to 500Hz
* Attenuates jitter up to several UI
* Freerun or holdover on loss of all inputs
* Hitless refe

ZL30623 Applications

* Telecom timing cards for SONET/SDH, SyncE, wireless base stations and other systems APLL HSDIV1 DIV1 ~3.7 to 4.2GHz, Fractional-N DIV2 Figure 6 HSDIV2 DIV3 Microprocessor Port (SPI or I2C Serial) and HW Control and Status Pins OC1P, OC1N VDDO1 OC2P, OC2N VDDO2 OC3P, OC3N VDDO3 R

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Microsemi ZL30623-like datasheet