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PLL205-54 - Programmable Clock Generator

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Datasheet Details

Part number PLL205-54
Manufacturer PhaseLink
File Size 286.45 KB
Description Programmable Clock Generator
Datasheet download datasheet PLL205-54_PhaseLink.pdf

PLL205-54 Product details

Description

Name VDD(1:5) VDDL1 VDDL2 GND XIN XOUT PD# PCI_STOP/ WDRESET# CPU_STOP AGP_STOP REF_STOP PCI(0:8) Number 1,5,15,23,33,31 48 41 2,8,12,19,32, 37,40,45,51 3 4 42 43 44 52 53 10,11,13,14, 16,17,18,20,21 Type P P P P I O I B I I I O Description Power Supplies.(See Power Group on page1) Power supply for CPUT0, CPUC0, CPUT_CS and CPUC_CS.Power supply for PLL CORE.Ground.14.318MHz crystal input to be connected to one end of the crystal.14.318MHz crystal output.PD is Asynchronous active low in

Features

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