PLL205-54 Programmable Clock Generator

PhaseLink

Description

m Preliminary PLL205-54 o c .Programmable Clock Generator for VIA KT-266 Chipset U 4 t .
Name VDD(1:5) VDDL1 VDDL2 GND XIN XOUT PD# PCI_STOP/ WDRESET# CPU_STOP AGP_STOP REF_STOP PCI(0:8) Number 1,5,15,23,33,31 48 41 2,8,12,19,32, 37,40,4.

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Datasheet Specifications

Part number: PLL205-54
Manufacturer: PhaseLink
File Size: 286.45 KB
Datasheet: PLL205-54_PhaseLink.pdf
Description: Programmable Clock Generator

Features

* PIN CONFIGURATION e e
* Generates all clock frequencies for VIA KT266 h chipset. S a
* Support one t pair of differential CPU clocks, one pair of a differential push-pull CPU clocks, 3 AGP and 10 PCI. D .
* w Enhanced PCI Output Drive selectable by I2C.
* w One 48MHz c

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PLL205-54 Programmable Clock Generator PhaseLink

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