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PLL602-10 Low Phase Noise XO

PLL602-10 Description

96MHz * 400MHz Low Phase Noise XO (for 12 * 25MHz Crystals) .
31 The PLL602-10 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC Die, with CMOS, LVDS and PECL output, for 96MHz to.

PLL602-10 Features

* w 62 mil w w Low phase noise output for the 96MHz to 400MHz range (-134 dBc at 10kHz offset). Selectable CMOS, PECL and LVDS output. 12 to 25MHz crystal input. Output Enable selector. 3.3V operation. Available in DIE (65 mil x 62 mil).

PLL602-10 Applications

* 1 2 3 4 5 Y X (0,0) MULTIPLIER SELECTION DIE SPECIFICATIONS Name Size Reverse side Pad dimensions Thickness Value 62 x 65 mil GND 80 micron x 80 micron BLOCK DIAGRAM VCO Divider w w w 10 mil . D Charge Pump t a S a e h 0 0 1 1 Pad #19 0 1 t e U 4 0 1 0 1 . c 6 m o 13 12 11 10

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Datasheet Details

Part number
PLL602-10
Manufacturer
PhaseLink
File Size
141.10 KB
Datasheet
PLL602-10_PhaseLink.pdf
Description
Low Phase Noise XO

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Low Phase Noise PhaseLink
PhaseLink PLL602-10-like datasheet