PLL602-14 Datasheet, Xo, PhaseLink

PLL602-14 Features

• Xo PIN CONFIGURATION e h S output for the 192MHz to
• Low phase noise a 384MHz range t (-134 dBc at 10kHz offset). a
• LVDS output. D24MHz crystal input.
• 12 . to

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PLL602-14

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PhaseLink

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📄 Datasheet

Description:

Low phase noise lvds xo. The PLL602-14 is a monolithic low jitter and low phase noise (-134dBc/Hz @ 10kHz offset) XO IC with LVDS output, for 192MHz to 384MH

PLL602-14 Application

• Applications BLOCK DIAGRAM Reference Divider XIN XOUT XTAL OSC m o .c U 4 t e e h S a t a .D w w w XOUT OE N/C GND GND F OUT = F XIN x 16 PLL

TAGS

PLL602-14

PhaseLink

📁 Related Datasheet

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