74VHCT138A Datasheet - STMicroelectronics

74VHCT138A 3 TO 8 LINE DECODER INVERTING

The 74VHCT138A is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low. If enable input G1 is he.

® 74VHCT138A 3 TO 8 LINE DECODER (INVERTING) PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 7.6 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 IMPROVED LAT.

74VHCT138A Datasheet (64.53 KB)