STP35N10 - N-Channel Logic Level Enhancement Mode Field Effect Transistor
STP35N10 Features
* Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 package. D G D S G S TP S E R IE S TO-220 S ABSOLUTE MAXIMUM RATINGS ( T C=25 °C unless otherwise noted ) Symbol VDS VGS ID IDM PD TJ, TSTG Parameter Drain-Source Voltage Gate-Source Volta
