* Synchronous Operation.
* 2 Stage Pipelined operation with 4 Burst.
* On-Chip Address Counter.
* Self-Timed Write Cycle.
* On-Chip Address and Control Registers.
* VDD= 3.3V+0.3V/-0.165V Power Supply.
* VDDQ Supply Voltage 3.3V+0.3V/-0.165V fo
K7A201800B Datasheet (273.66 KB)
K7A201800B
Samsung semiconductor
273.66 KB
64kx36 & 64kx32-bit synchronous pipelined burst sram.
K7A203600B K7A203200B K7A201800B Document Title Preliminary 64Kx36/x32 & 128Kx18 Synchronous SRAM 64Kx36 & 64Kx32 & 128Kx18-Bit Synchronous Pipeline.
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