K7A203200A Datasheet - Samsung semiconductor

K7A203200A 64Kx32-Bit Synchronous Pipelined Burst SRAM

The K7A203200A is a 2,097,152-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. It is organized as 64K words of 32bits and integrates address and control registers, a 2-bit burst address counter and added some new funct.

www.DataSheet4U.com PRELIMINARY K7A203200A Document Title 64Kx32-Bit Synchronous Pipelined Burst SRAM, 64Kx32 Synchronous SRAM Revision History Rev. No. 0.0 1.0 History Final spec release. Add VDDQ Supply voltage( 2.5V ) Draft Date Nov. 10. 1998 Dec. 02. 1998 Remark Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and.

K7A203200A Features

* Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address

K7A203200A Datasheet (304.82 KB)