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K7A203600A 64Kx36-Bit Synchronous Pipelined Burst SRAM

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Description

PRELIMINARY K7A203600A Document Title 64Kx36-Bit Synchronous Pipelined Burst SRAM 64Kx36 Synchronous SRAM Revision History Rev.No.0.0 0.1 History .
The K7A203600A is a 2,359,296-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC bas.

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Datasheet Specifications

Part number
K7A203600A
Manufacturer
Samsung semiconductor
File Size
413.70 KB
Datasheet
K7A203600A_Samsungsemiconductor.pdf
Description
64Kx36-Bit Synchronous Pipelined Burst SRAM

Features

* Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address

Applications

* GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address

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