FDG6304P Description
These dual P−Channel logic level enhancement mode field effect transistors are produced using onsemi proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on−state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs.
FDG6304P Key Features
- 25 V, -0.41 A Continuous, -1.5 A Peak
- Very Low Level Gate Drive Requirements Allowing Direct
- Gate-Source Zener for ESD Ruggedness (>6 kV Human Body
- pact Industry Standard SC70-6 Surface Mount Package
- These Devices are Pb-Free and are RoHS pliant