Triggered Datasheet | Specifications & PDF Download

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua

(334 views)

SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are

(227 views)

U. R L. O 1639 EC #E7 Fi le I GN ZE D TO-220 Isolated MT2 MT1 T Internally Triggered Triacs (4 A to 15 A) E3 General Description Teccor’s Q

(206 views)

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua

(195 views)

K0900G - K2600G Axial Leaded Silicon Bilateral Voltage Triggered Features · Excellent capability of absorbing transient surge · Quick response to sur

(193 views)

U. R L. O 1639 EC #E7 Fi le I GN ZE D TO-220 Isolated MT2 MT1 T Internally Triggered Triacs (4 A to 15 A) E3 General Description Teccor’s Q

(187 views)

U. R L. O 1639 EC #E7 Fi le I GN ZE D TO-220 Isolated MT2 MT1 T Internally Triggered Triacs (4 A to 15 A) E3 General Description Teccor’s Q

(186 views)

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hit

(184 views)

U. R L. O 1639 EC #E7 Fi le I GN ZE D TO-220 Isolated MT2 MT1 T Internally Triggered Triacs (4 A to 15 A) E3 General Description Teccor’s Q

(181 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse inputs. Output

(151 views)

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs

(148 views)

SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − R

(147 views)

www.ti.com PACKAGE OPTION ADDENDUM 4-Dec-2021 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan (1) Drawi

(144 views)

SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS114A offers common clock and common clear inputs and individual J, K, and set in

(140 views)

DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised March 2000 DM74

(130 views)

DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops March 1998 DM74LS373/DM74LS374 3-STATE Octal D-Type Trans

(121 views)

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D

(118 views)

DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs September 1986 Revised July 2001 DM7474 Dual Posi

(116 views)

SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS

(112 views)

SN54LS373, SN54LS374, SN54S373, SN54S374, SN74LS373, SN74LS374, SN74S373, SN74S374 OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS SDLS

(112 views)