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March 1998
FDN358P P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
SuperSOTTM-3 P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
-1.5 A, -30 V, RDS(ON) = 0.125 Ω @ VGS = -10 V RDS(ON) = 0.20 Ω @ VGS = - 4.5 V.