CY7C1141V18 Datasheet - Cypress Semiconductor

CY7C1141V18 - (CY7C11xxV18) SRAM 4-Word Burst Architecture

The CY7C1141V18, CY7C1156V18, CY7C1143V18, and CY7C1145V18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II+ architecture.

QDR-II+ architecture consists of two separate ports to access the memory array.

The read port has dedicated data outputs to support read operations and the write port

CY7C1141V18 Features

* Separate Independent read and write data ports

* Supports concurrent transactions

* 300 MHz to 375 MHz clock for high bandwidth

* 4-Word Burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 750 MHz) at 375 MHz

Datasheet Details

CY7C1141V18

Cypress Semiconductor

1.18 MB

(cy7c11xxv18) sram 4-word burst architecture.

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